Cyient Semiconductors & MIPS Join Forces to Build Custom RISC-V Chips

Hyderabad-based Cyient Semiconductors Private Limited, wholly-owned subsidiary of Cyient Ltd, has partnered with global RISC-V processor IP leader MIPS to develop domain-optimised ASIC (application-specific integrated circuits) and ASSP (application-specific standard products) solutions. The collaboration will utilise the MIPS Atlas portfolio of advanced and efficient processor IP to create cutting-edge silicon solutions.

Targeting High-Growth Sectors

The partnership aims to address high-demand areas such as real-time, safety-critical applications, motor control, power delivery systems, and compute efficiency. These are crucial for industries like automotive, industrial automation, and data centers. The joint effort will combine Cyient’s analog mixed-signal design expertise with MIPS’ RISC-V based Atlas CPU IP to deliver efficient, programmable, and scalable solutions.

Open Architecture and Fast Market Reach

With the growing need for software-defined vehicles and intelligent infrastructure, the demand for custom silicon is on the rise. The solutions will be based on the open RISC-V instruction set architecture, avoiding vendor lock-in and promoting flexibility. The partnership will also allow OEMs and system integrators to reduce time-to-market and lower platform costs.

“As compute systems scale from cloud to the edge, intelligent power delivery is emerging as a key enabler of performance and efficiency,” said Suman Narayan, CEO of Cyient Semiconductors. “Our collaboration with MIPS allows us to bring together embedded intelligence and advanced power architectures in custom silicon platforms built on a scalable, open foundation. Together, we are designing tomorrow’s semiconductors — purpose-built for a more connected and power-efficient world.”

“The problem of power efficiency and motor control are both real-time compute workloads for which MIPS M8500 microcontrollers are the optimal choice,” said Sameer Wasson, CEO of MIPS. “Building around our best-in-class real-time and control-loop performance and efficiency, Cyient can bring their unique capability in intelligent power delivery into custom ASIC and ASSP designs to build differentiated solutions that meet our customers unique needs in their target markets.”

Also Read: Cyient DET Revenue Down 1.6% YoY in FY25!

Conclusion

Cyient and MIPS’ collaboration is poised to deliver intelligent, efficient silicon solutions for next-generation automotive, industrial, and data center applications, offering customers greater flexibility and performance.

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